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restructured repository based on following standards:
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Yehonal
304
modules/dep/acelite/ace/Atomic_Op.cpp
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304
modules/dep/acelite/ace/Atomic_Op.cpp
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#include "ace/Atomic_Op.h"
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#include "ace/OS_NS_unistd.h"
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#if !defined (__ACE_INLINE__)
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#include "ace/Atomic_Op.inl"
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#endif /* __ACE_INLINE__ */
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#if defined (ACE_HAS_BUILTIN_ATOMIC_OP)
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#if defined (ACE_INCLUDE_ATOMIC_OP_SPARC)
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# include "ace/Atomic_Op_Sparc.h"
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#endif /* ACE_INCLUDE_ATOMIC_OP_SPARC */
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namespace {
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#if defined (_MSC_VER)
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// Disable "no return value" warning, as we will be putting
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// the return values directly into the EAX register.
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#pragma warning (push)
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#pragma warning (disable: 4035)
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#endif /* _MSC_VER */
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long
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single_cpu_increment (volatile long *value)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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long tmp = 1;
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "xadd %0, (%1)" : "+r"(tmp) : "r"(addr) );
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return tmp + 1;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_add_long (
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reinterpret_cast<volatile unsigned long*> (value), 1);
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#elif defined(__GNUC__) && defined(PPC)
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long tmp;
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asm("lwz %0,%1" : "=r" (tmp) : "m" (*value) );
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asm("addi %0,%0,1" : "+r" (tmp) );
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asm("stw %0,%1" : "+r" (tmp), "=m" (*value) );
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return tmp;
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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single_cpu_decrement (volatile long *value)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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long tmp = -1;
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "xadd %0, (%1)" : "+r"(tmp) : "r"(addr) );
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return tmp - 1;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_add_long (
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reinterpret_cast<volatile unsigned long*> (value), -1);
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#elif defined(__GNUC__) && defined(PPC)
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long tmp;
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asm("lwz %0,%1" : "=r" (tmp) : "m" (*value) );
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asm("addi %0,%0,-1" : "+r" (tmp) );
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asm("stw %0,%1" : "+r" (tmp), "=m" (*value) );
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return tmp;
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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single_cpu_exchange (volatile long *value, long rhs)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "xchg %0, (%1)" : "+r"(rhs) : "r"(addr) );
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return rhs;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_swap_long (
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reinterpret_cast<volatile unsigned long*> (value), rhs);
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#elif defined(__GNUC__) && defined(PPC)
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long tmp;
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asm("lwz %0,%1" : "=r" (tmp) : "m" (rhs) );
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asm("stw %0,%1" : "+r" (tmp), "=m" (*value) );
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return tmp;
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_UNUSED_ARG (rhs);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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single_cpu_exchange_add (volatile long *value, long rhs)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "xadd %0, (%1)" : "+r"(rhs) : "r"(addr) );
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return rhs;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_swap_add_long (
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reinterpret_cast<volatile unsigned long*> (value), rhs);
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#elif defined(__GNUC__) && defined(PPC)
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long tmp;
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asm("add %0,%1,%2" : "=r" (tmp) : "r" (*value), "r" (rhs) );
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asm("stw %0,%1" : "+r" (tmp), "=m" (*value) );
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return tmp;
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#elif defined (WIN32) && !defined (ACE_HAS_INTERLOCKED_EXCHANGEADD)
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# if defined (_MSC_VER)
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__asm
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{
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mov eax, rhs
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mov edx, value
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xadd [edx], eax
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}
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// Return value is already in EAX register.
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# elif defined (__BORLANDC__)
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_EAX = rhs;
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_EDX = reinterpret_cast<unsigned long> (value);
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__emit__(0x0F, 0xC1, 0x02); // xadd [edx], eax
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// Return value is already in EAX register.
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# else /* _MSC_VER */
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ACE_UNUSED_ARG (value);
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ACE_UNUSED_ARG (rhs);
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ACE_NOTSUP_RETURN (-1);
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# endif /* _MSC_VER */
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_UNUSED_ARG (rhs);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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multi_cpu_increment (volatile long *value)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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long tmp = 1;
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "lock ; xadd %0, (%1)" : "+r"(tmp) : "r"(addr) );
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return tmp + 1;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_add_long (
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reinterpret_cast<volatile unsigned long*> (value), 1);
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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multi_cpu_decrement (volatile long *value)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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long tmp = -1;
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "lock ; xadd %0, (%1)" : "+r"(tmp) : "r"(addr) );
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return tmp - 1;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_add_long (
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reinterpret_cast<volatile unsigned long*> (value), -1);
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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multi_cpu_exchange (volatile long *value, long rhs)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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// The XCHG instruction automatically follows LOCK semantics
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asm( "xchg %0, (%1)" : "+r"(rhs) : "r"(addr) );
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return rhs;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_swap_long (
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reinterpret_cast<volatile unsigned long*> (value), rhs);
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_UNUSED_ARG (rhs);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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long
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multi_cpu_exchange_add (volatile long *value, long rhs)
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{
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#if defined (ACE_HAS_INTEL_ASSEMBLY)
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unsigned long addr = reinterpret_cast<unsigned long> (value);
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asm( "lock ; xadd %0, (%1)" : "+r"(rhs) : "r"(addr) );
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return rhs;
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#elif !defined (ACE_HAS_SOLARIS_ATOMIC_LIB) && (defined (sun) || \
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(defined (__SUNPRO_CC) && (defined (__i386) || defined (__x86_64))))
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return ace_atomic_swap_add_long (
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reinterpret_cast<volatile unsigned long*> (value), rhs);
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#elif defined (WIN32) && !defined (ACE_HAS_INTERLOCKED_EXCHANGEADD)
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# if defined (_MSC_VER)
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__asm
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{
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mov eax, rhs
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mov edx, value
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lock xadd [edx], eax
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}
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// Return value is already in EAX register.
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# elif defined (__BORLANDC__)
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_EAX = rhs;
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_EDX = reinterpret_cast<unsigned long> (value);
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__emit__(0xF0, 0x0F, 0xC1, 0x02); // lock xadd [edx], eax
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// Return value is already in EAX register.
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# else /* _MSC_VER */
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ACE_UNUSED_ARG (value);
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ACE_UNUSED_ARG (rhs);
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ACE_NOTSUP_RETURN (-1);
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# endif /* _MSC_VER */
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#else /* ACE_HAS_INTEL_ASSEMBLY*/
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ACE_UNUSED_ARG (value);
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ACE_UNUSED_ARG (rhs);
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ACE_NOTSUP_RETURN (-1);
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#endif /* ACE_HAS_INTEL_ASSEMBLY*/
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}
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#if defined (_MSC_VER)
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#pragma warning (pop)
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#endif /* _MSC_VER */
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} // end namespace
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ACE_BEGIN_VERSIONED_NAMESPACE_DECL
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, long>::increment_fn_) (volatile long *) = multi_cpu_increment;
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, long>::decrement_fn_) (volatile long *) = multi_cpu_decrement;
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, long>::exchange_fn_) (volatile long *, long) = multi_cpu_exchange;
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, long>::exchange_add_fn_) (volatile long *, long) = multi_cpu_exchange_add;
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void
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ACE_Atomic_Op<ACE_Thread_Mutex, long>::init_functions (void)
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{
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if (ACE_OS::num_processors () == 1)
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{
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increment_fn_ = single_cpu_increment;
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decrement_fn_ = single_cpu_decrement;
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exchange_fn_ = single_cpu_exchange;
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exchange_add_fn_ = single_cpu_exchange_add;
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}
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else
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{
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increment_fn_ = multi_cpu_increment;
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decrement_fn_ = multi_cpu_decrement;
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exchange_fn_ = multi_cpu_exchange;
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exchange_add_fn_ = multi_cpu_exchange_add;
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}
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}
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void
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ACE_Atomic_Op<ACE_Thread_Mutex, long>::dump (void) const
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{
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#if defined (ACE_HAS_DUMP)
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ACELIB_DEBUG ((LM_DEBUG, ACE_BEGIN_DUMP, this));
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ACELIB_DEBUG ((LM_DEBUG, ACE_END_DUMP));
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#endif /* ACE_HAS_DUMP */
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}
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, unsigned long>::increment_fn_) (volatile long *) = multi_cpu_increment;
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, unsigned long>::decrement_fn_) (volatile long *) = multi_cpu_decrement;
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, unsigned long>::exchange_fn_) (volatile long *, long) = multi_cpu_exchange;
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long (*ACE_Atomic_Op<ACE_Thread_Mutex, unsigned long>::exchange_add_fn_) (volatile long *, long) = multi_cpu_exchange_add;
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void
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ACE_Atomic_Op<ACE_Thread_Mutex, unsigned long>::init_functions (void)
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{
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if (ACE_OS::num_processors () == 1)
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{
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increment_fn_ = single_cpu_increment;
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decrement_fn_ = single_cpu_decrement;
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exchange_fn_ = single_cpu_exchange;
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exchange_add_fn_ = single_cpu_exchange_add;
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}
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else
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{
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increment_fn_ = multi_cpu_increment;
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decrement_fn_ = multi_cpu_decrement;
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exchange_fn_ = multi_cpu_exchange;
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exchange_add_fn_ = multi_cpu_exchange_add;
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}
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}
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void
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ACE_Atomic_Op<ACE_Thread_Mutex, unsigned long>::dump (void) const
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{
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#if defined (ACE_HAS_DUMP)
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ACELIB_DEBUG ((LM_DEBUG, ACE_BEGIN_DUMP, this));
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ACELIB_DEBUG ((LM_DEBUG, ACE_END_DUMP));
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#endif /* ACE_HAS_DUMP */
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}
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ACE_END_VERSIONED_NAMESPACE_DECL
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#endif /* ACE_HAS_BUILTIN_ATOMIC_OP */
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